A well known cause of failure for electronic integrated circuits is exposure to a large and sudden electrostatic discharge (ESD). During the manufacture and use of integrated circuits, both equipment and personnel can build up substantial amounts of charge, often by triboelectric charge buildup during the contact and subsequent removal of dissimilar materials from one another. The built-up electrostatic charge can be quickly discharged when the charged item comes in contact with an integrated circuit, especially when portions of the circuit are connected to power supplies, including equipment ground. The discharge can cause significant damage to the integrated circuit by way of dielectric breakdown of oxides and other films, and also by high levels of conduction through relatively small areas of the circuit arising from reverse breakdown of p-n junctions on the circuit. Especially damaging results can occur if the diode enters the negative resistance region of its diode breakdown characteristics, as sufficient conduction can occur to melt conductive material such as polysilicon or aluminum, as a result of resistive heating. The molten material can flow along the lines of the electric field to create a short circuit, such as a source-to-drain short in a MOSFET. This short circuit will remain after the electrostatic discharge has completed, and is likely to render the integrated circuit useless. Complementary metal oxide semiconductor ("CMOS") field effect circuits are particularly subject to negative consequences of electrostatic discharges. In high density CMOS devices, an electrostatic discharge may develop an extremely high voltage which easily destroys the very thin gate oxides and very short channel devices of these circuits.
To protect CMOS devices against such high voltages, a single zener diode may be coupled to the CMOS device such that the zener diode is connected between the gate and reference supply. This configuration will clamp a voltage spike in one direction and will utilize the forward voltage drop to protect the device in the other direction. This configuration imposes design limitations because it does not permit the ESD sensitive node to operate at a voltage beyond the power supply voltage. Furthermore, a series resistor is usually required to limit power delivered to the zener diode. This added resistor reduces the performance of the circuit by slowing down switching speeds. Other CMOS devices protect against high voltages by requiring two voltage reference supplies, creating a three terminal structure.
Thus a need has arisen for two-terminal CMOS structures with ESD protection but without the requirement of limiting the sensitive protected node (which is usually a MOS gate) to one diode drop beyond its single supply reference.